A Phase-Lock Loop circuit, or PLL, is often used for controlling the frequency of a signal within an electrical circuit. The PLL is typically comprised of a phase detector, a low pass filter, a voltage controlled oscillator (“VCO”) or a current controlled oscillator (“CCO”), and a feedback path from the oscillator to the phase detector. The feedback path may also contain a frequency divider component. Generally, a PLL is used in fully integrated or partly integrated applications, such as high-speed clock data recovery, frequency synthesizers, clock generators, and clock distribution. Analog PLL designs are often built with a current controlled oscillator that is merely controlled by a simple input current branch. A free-running frequency (i.e., the frequency at which a normally driven oscillator operates in the absence of a driving signal) of the oscillator is maintained by using a simple constant-current injection branch (providing current signal Iconst) in parallel with a control-current branch (providing current signal Icont) The overall current (Isum) received as an input by the current controlled oscillator is based upon the sum of the constant-current signal Iconst and the control-current signal Icont. As a result, if the control-current Icont reaches zero (i.e. no current), the constant-current Iconst ensures the oscillator is still receiving current and, thus, delivering a free running frequency signal (Ffree). Unfortunately, the adjustment for a constant free-running frequency of a voltage controlled oscillator (VCO) based PLL has been more complicated than that for a current controlled oscillator due to the lack of a constant-current injection in the VCO.